1. Field
Exemplary embodiments of the present invention relate to semiconductor design technology, and more particularly, to a multi-chip package including a plurality of semiconductor chips.
2. Description of the Related Art
In general, semiconductor devices including DDR SDRAM (Double Data Rate Synchronous DRAM) are developing to satisfy users' various needs. For such a development direction, package technology of semiconductor devices has been proposed. For example, a multi-chip package has been developed as the package technology. The multi-chip package refers to a structure for forming one single chip using a plurality of semiconductor chips. Depending on the configurations of the multi-chip package, a plurality of semiconductor chips having a memory function may be used to increase a storage capacity, or a plurality of semiconductor chips having different functions may be used to improve performance.
For reference, the multi-chip package may be divided into a single-layer multi-chip package and a multilayer multi-chip package. The single-layer multi-chip package includes a plurality of semiconductor chips arranged in parallel on a plane, and the multilayer multi-chip package includes a plurality of semiconductor chips stacked and arranged therein.
As semiconductor devices have been miniaturized, an error related to a peak current has been raised. In order to control a miniaturized circuit, a low-level voltage is to be used. At this time, when a peak current occurs, a voltage drop occurs to cause a malfunction of the circuit. Particularly in a multichip package, when operation periods of a plurality of semiconductor chips overlap each other, a peak current may occur to cause a voltage drop. In this case, the voltage drop may cause a malfunction of the multi-chip package as well as malfunctions of some semiconductor chips. Therefore, the multi-chip package is being developed to prevent the error related to the peak current from occurring.